1. Field of the invention
The present invention relates to a multiplication circuit, and more particularly to a digital multiplication circuit for use in digital processors.
2. Description of related art
Heretofore, a multiplication has been executed by using either a general purpose processor operated in a programed manner or a single purpose multiplication circuit including a matrix of adders. In the case that the multiplication is executed by the general purpose processor, once a multiplicand is leftwardly shifted one bit, the shifted multiplicand is accumulatively added. The repetition time of the addition operations is defined by a multiplier. The conventional general purpose processor has needed a few program steps for each addition operation and therefore required a long time until one multiplication operation is completed. On the other hand, the single purpose multiplication circuit including a matrix of adders can execute a multiplication operation at a high speed but required a large amount of hardware. For example, the bit number of the adder depends upon the bit number of input and output data, and therefore, the larger the data length to be processed becomes, the larger the scale of the multiplication circuit becomes.